NVIDIA DeepStream SDK API Reference
7.1 Release
deepstream_dsexample.h
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2018-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: LicenseRef-NvidiaProprietary
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*
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* NVIDIA CORPORATION, its affiliates and licensors retain all intellectual
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* property and proprietary rights in and to this material, related
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* documentation and any modifications thereto. Any use, reproduction,
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* disclosure or distribution of this material and related documentation
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* without an express license agreement from NVIDIA CORPORATION or
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* its affiliates is strictly prohibited.
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*/
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#ifndef _NVGSTDS_DSEXAMPLE_H_
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#define _NVGSTDS_DSEXAMPLE_H_
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#include <gst/gst.h>
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#ifdef __cplusplus
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extern
"C"
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{
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#endif
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typedef
struct
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{
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// Create a bin for the element only if enabled
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gboolean
enable
;
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// Struct members to store config / properties for the element
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gboolean
full_frame
;
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gint
processing_width
;
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gint
processing_height
;
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gboolean
blur_objects
;
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guint
unique_id
;
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guint
gpu_id
;
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guint
batch_size
;
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// For nvvidconv
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guint
nvbuf_memory_type
;
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}
NvDsDsExampleConfig
;
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// Struct to store references to the bin and elements
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typedef
struct
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{
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GstElement *
bin
;
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GstElement *
queue
;
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GstElement *
pre_conv
;
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GstElement *
cap_filter
;
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GstElement *
elem_dsexample
;
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}
NvDsDsExampleBin
;
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// Function to create the bin and set properties
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gboolean
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create_dsexample_bin
(
NvDsDsExampleConfig
*config,
NvDsDsExampleBin
*bin);
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#ifdef __cplusplus
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}
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#endif
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#endif
/* _NVGSTDS_DSEXAMPLE_H_ */
NvDsDsExampleConfig::enable
gboolean enable
Definition:
deepstream_dsexample.h:26
NvDsDsExampleBin::bin
GstElement * bin
Definition:
deepstream_dsexample.h:42
NvDsDsExampleBin::pre_conv
GstElement * pre_conv
Definition:
deepstream_dsexample.h:44
NvDsDsExampleConfig::processing_height
gint processing_height
Definition:
deepstream_dsexample.h:30
NvDsDsExampleBin
Definition:
deepstream_dsexample.h:40
NvDsDsExampleConfig::blur_objects
gboolean blur_objects
Definition:
deepstream_dsexample.h:31
NvDsDsExampleConfig
Definition:
deepstream_dsexample.h:23
create_dsexample_bin
gboolean create_dsexample_bin(NvDsDsExampleConfig *config, NvDsDsExampleBin *bin)
NvDsDsExampleConfig::unique_id
guint unique_id
Definition:
deepstream_dsexample.h:32
NvDsDsExampleConfig::gpu_id
guint gpu_id
Definition:
deepstream_dsexample.h:33
NvDsDsExampleConfig::batch_size
guint batch_size
Definition:
deepstream_dsexample.h:34
NvDsDsExampleConfig::full_frame
gboolean full_frame
Definition:
deepstream_dsexample.h:28
NvDsDsExampleConfig::processing_width
gint processing_width
Definition:
deepstream_dsexample.h:29
NvDsDsExampleBin::elem_dsexample
GstElement * elem_dsexample
Definition:
deepstream_dsexample.h:46
NvDsDsExampleBin::cap_filter
GstElement * cap_filter
Definition:
deepstream_dsexample.h:45
NvDsDsExampleBin::queue
GstElement * queue
Definition:
deepstream_dsexample.h:43
NvDsDsExampleConfig::nvbuf_memory_type
guint nvbuf_memory_type
Definition:
deepstream_dsexample.h:36
Advance Information | Subject to Change | Generated by NVIDIA | Mon Oct 14 2024 13:27:43 | PR-09318-R32